5721

32 kHz bandwidth 24 bits ADC , so noise floor at about 120 dB Interfacing with PC Single channel

I intend to make a spectrum analyzer to analyze low distortion audio systems. I want to use a 24 bit ADC at 64 kHz.It will operate at a clock of 1024 kHz, so with an oversampling rate of 16 times.
When the ADC has taken a sample (15.625 us between samples) there are about 15 us available to read the data in serial format. The data can be clocked out by the SCLK- signal (Serial Clock) of at least 1.6 MHz. This can be done by at 64 MHz uP. A 24 bit shift register will be used to catche the sample. When 64 k samples are taken, the data will be transported to the PC. There the FFT wil be executed and the gathered data can be displayed. 

Intended specifications:
Sampling rate 64 KHz
Noise floor about -120dB
Maximum input 5 V or 50 V peak. (internal attanuator)
Horizontal resolution 1, 2 or 4 Hz. (selectable)
Time for displaying one sample with high resolution:
taking sample: 1 s.
Transport: 12 s.
Making FFT: 

Power dissipation: Expected < 2 W
Costs: Components < € 50
PCB € 100
Case < € 20
Needed time to complete project: 1 year 

2025-10-17
Added: first circuit diagrams, preliminary.