DESHPANDE'S LATCH
Here is an interesting Educational tool that helps the students, the hobbyists, and the beginners to learn how the IC555 functions.This simplest circuit practically explains the theory behind the working of IC555. The interesting part of the circuit is that it utilizes no external active components but just 2 IC555 and an Indicator LED. It is wired in none of its conventional modes of operations, like monostable, astable, or bistable!
Deshpande’s Latch is an educational project. It is the simplest experimental logic circuit using two IC 555, with no active external component used, that helps to understand how the IC 555 functions. The advantage of the circuit is that since two ICs are used and are wired in an exactly opposite configurations, the results of those configurations, particularly on pin 3 (output pin) and pin 7 (discharge pin) of both the ICs, can be studied simultaneously. Therefore, the project should prove as an educational tool to learn and teach the functions of IC555.
The diagram, Figure 1, shows the basic circuit of the latch that utilizes only three components: Two ICs and one LED. The LED is optional, as it is used only as a visible indicator to show that the Latch is working as per the logic shown in the diagram.
In the circuit, pin 2 and pin 6 of IC1 and IC2 are wired exactly opposite in their standard logical configurations in such a way that the individual outputs at pin 3 of both ICs are always constant and opposite to one another. Also, the state of the internal discharge transistor at pin 7 of both ICs is always constant and opposite to one another. This is mandatory to make the latch work.
In IC1, the trigger comparator is kept active, and the threshold comparator is kept inactive by grounding pin 2 and pin 6. In this standard configuration, the output at pin 3 of the IC always remains HIGH and the internal discharge transistor at pin 7 always remains OFF, which means disconnected from the ground. The output pin 3 of IC1 is used here as a ‘source’ to supply positive DC to pin 8 of IC2.
In contrast to the configuration of IC1, in IC2, the trigger comparator is kept inactive, and the threshold comparator is kept active by connecting pin 2 and pin 6 to pin 5 of IC1. In this standard configuration, the output at pin 3 of the IC always remains LOW, and the internal discharge transistor at pin 7 always remains ON, which means connected to the ground. The output pin 3 of IC2, in contrast to pin 3 of IC1, is used here to ‘sink’ IC1 by connecting its pin 1 here.
In the circuit, the positive end of the power supply is connected to pin 8 of IC1 and the negative end of the power supply is connected to pin 1 of IC2. IC1 is supplying power to IC2 and IC2 is sinking IC1, thereby latching the two ICs. Control pin 5 of IC1 is used to hold HIGH pin 2 and pin 6 of IC2. These pins are also connected to pin 7 of IC1 just to demonstrate that its internal discharge transistor is OFF, which means disconnected from the ground, so internally unable to pull the pins 2 and 6 LOW. Control pin 5 of IC2 is used to limit the current to D1. Pin 7 of IC2 is used to provide ground to the cathode of D1 as its internal discharge transistor is ON, which means connected to the ground.
(Note:- IC 555 has three 5K resistances connected in series internally between pin 8 and pin 1 with a 5K ohm tapping at pin 5. As a special feature, the advantage of this is taken in the Latch to limit the external components count.)
On powering the circuit, both the ICs latch. Indicator LED D1 glows, confirming all the salient features and multitasking of the circuit as described in the text above, at a time, in a single operation!
An interesting feature is added in the original circuit (Figure 1) as explained above to make it more demonstrative and better understandable. This is shown in Figure 2. It utilizes resistances R1, R2, and switches S1, S2 as additional external components. As stated earlier, the configuration of the ICs should be opposite and that too as per the schematic only. However, a ‘fault’ occurs when either S1 or S2 is pushed. Upon pushing any one of the two switches, the configuration of both the ICs becomes the same, and the latch fails. As a result, D1 turns off. This is because, when S1 is pushed, the configuration of IC1, as described earlier, is reversed as pin 2 and pin 6 of IC1, which were together grounded earlier, get connected to Vcc through pull-up resistance R1 and are held HIGH. When S2 is pushed, the configuration of IC2, as described earlier, is reversed as pin 2 and pin 6 of IC2, which were connected together to pin 5 of IC1, to hold them HIGH, now get grounded through R2.is s
Note:- The circuits can be assembled and tested on a breadboard by using hookup wires.
Parts List:
1) IC1 and IC2 555 timer IC
2) D1 white LED 5 mm
3) S1 and S2 'push-to-off' switches (Breadboard mounting)
4) R1 and R2 10k ½ watt resistors
Misc: 9 VDC battery as power supply, breadboard, hookup wires
The diagram, Figure 1, shows the basic circuit of the latch that utilizes only three components: Two ICs and one LED. The LED is optional, as it is used only as a visible indicator to show that the Latch is working as per the logic shown in the diagram.
In the circuit, pin 2 and pin 6 of IC1 and IC2 are wired exactly opposite in their standard logical configurations in such a way that the individual outputs at pin 3 of both ICs are always constant and opposite to one another. Also, the state of the internal discharge transistor at pin 7 of both ICs is always constant and opposite to one another. This is mandatory to make the latch work.
In IC1, the trigger comparator is kept active, and the threshold comparator is kept inactive by grounding pin 2 and pin 6. In this standard configuration, the output at pin 3 of the IC always remains HIGH and the internal discharge transistor at pin 7 always remains OFF, which means disconnected from the ground. The output pin 3 of IC1 is used here as a ‘source’ to supply positive DC to pin 8 of IC2.
In contrast to the configuration of IC1, in IC2, the trigger comparator is kept inactive, and the threshold comparator is kept active by connecting pin 2 and pin 6 to pin 5 of IC1. In this standard configuration, the output at pin 3 of the IC always remains LOW, and the internal discharge transistor at pin 7 always remains ON, which means connected to the ground. The output pin 3 of IC2, in contrast to pin 3 of IC1, is used here to ‘sink’ IC1 by connecting its pin 1 here.
In the circuit, the positive end of the power supply is connected to pin 8 of IC1 and the negative end of the power supply is connected to pin 1 of IC2. IC1 is supplying power to IC2 and IC2 is sinking IC1, thereby latching the two ICs. Control pin 5 of IC1 is used to hold HIGH pin 2 and pin 6 of IC2. These pins are also connected to pin 7 of IC1 just to demonstrate that its internal discharge transistor is OFF, which means disconnected from the ground, so internally unable to pull the pins 2 and 6 LOW. Control pin 5 of IC2 is used to limit the current to D1. Pin 7 of IC2 is used to provide ground to the cathode of D1 as its internal discharge transistor is ON, which means connected to the ground.
(Note:- IC 555 has three 5K resistances connected in series internally between pin 8 and pin 1 with a 5K ohm tapping at pin 5. As a special feature, the advantage of this is taken in the Latch to limit the external components count.)
On powering the circuit, both the ICs latch. Indicator LED D1 glows, confirming all the salient features and multitasking of the circuit as described in the text above, at a time, in a single operation!
An interesting feature is added in the original circuit (Figure 1) as explained above to make it more demonstrative and better understandable. This is shown in Figure 2. It utilizes resistances R1, R2, and switches S1, S2 as additional external components. As stated earlier, the configuration of the ICs should be opposite and that too as per the schematic only. However, a ‘fault’ occurs when either S1 or S2 is pushed. Upon pushing any one of the two switches, the configuration of both the ICs becomes the same, and the latch fails. As a result, D1 turns off. This is because, when S1 is pushed, the configuration of IC1, as described earlier, is reversed as pin 2 and pin 6 of IC1, which were together grounded earlier, get connected to Vcc through pull-up resistance R1 and are held HIGH. When S2 is pushed, the configuration of IC2, as described earlier, is reversed as pin 2 and pin 6 of IC2, which were connected together to pin 5 of IC1, to hold them HIGH, now get grounded through R2.is s
Note:- The circuits can be assembled and tested on a breadboard by using hookup wires.
Parts List:
1) IC1 and IC2 555 timer IC
2) D1 white LED 5 mm
3) S1 and S2 'push-to-off' switches (Breadboard mounting)
4) R1 and R2 10k ½ watt resistors
Misc: 9 VDC battery as power supply, breadboard, hookup wires
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